Today, a display apparatus including an active matrix substrate that includes a switching element in each of pixels (e.g., liquid crystal display apparatus) is in wide use. An active matrix substrate including a thin film transistor (hereinafter, referred to as a “TFT”) as a switching element is referred to as a “TFT substrate”. In this specification, a portion of the TFT substrate that corresponds to a pixel of the display apparatus may also be referred to as a “pixel”.
Recently, it has been proposed to use an oxide semiconductor, instead of amorphous silicon or polycrystalline silicon, as a material of an active layer of the TFT. Such a TFT is referred to as an “oxide semiconductor TFT”. The oxide semiconductor has a higher mobility than that of amorphous silicon. Therefore, the oxide semiconductor TFT is operable at a higher speed than an amorphous silicon TFT. An oxide semiconductor film is formed by a simpler process than a polycrystalline silicon film, and therefore, is applicable to a device requiring a large area size.
The oxide semiconductor TFT may be produced by a process substantially the same as that of the amorphous silicon TFT. Therefore, many oxide semiconductor TFTs produced today have a bottom-gate structure, like the amorphous silicon TFT.
Needless to say, a top-gate structure is not unadoptable for an oxide semiconductor TFT. Use of the top-gate structure easily decreases a parasitic capacitance caused by overlapping of a gate electrode and a source electrode/a drain electrode, and therefore, is advantageous to design a circuit operating at a high speed.
A semiconductor device including an oxide semiconductor TFT of a top-gate structure is disclosed in, for example, Patent Document No. 1. FIG. 16 shows a semiconductor device 800 disclosed in Patent Document No. 1.
As shown in FIG. 16, the semiconductor device 800 includes a substrate 801 and an oxide semiconductor TFT 810 supported by the substrate 801. The oxide semiconductor TFT 810 includes an oxide semiconductor layer 811, a gate insulating layer 812, a gate electrode 813, a source electrode 814 and a drain electrode 815.
On the substrate 801, underlying insulating layers 803a and 803b are formed in this order. On the upper underlying insulating layer 803b, the oxide semiconductor layer 811 is formed. The oxide semiconductor layer 811 includes a channel region 811a and low resistance regions 811b and 811c respectively located to two sides of the channel region 811a. On the channel region 811a of the oxide semiconductor layer 811, the gate insulating layer 812 and the gate electrode 813 are formed in this order.
A silicon nitride film 816 is formed so as to cover the oxide semiconductor layer 811, the gate insulating layer 812 and the gate electrode 813. On the silicon nitride film 816, an interlayer insulating layer 806 is formed. In the silicon nitride film 816 and the interlayer insulating layer 806, contact holes respectively exposing a part of the low resistance region 811b and a part of the low resistance region 811c of the oxide semiconductor layer 811 are formed. The source electrode 814 and the drain electrode 815 are respectively connected with the low resistance regions 811b and 811c in the contact holes.
During the production of the semiconductor device 800, an oxide insulating film (e.g., silicon oxide film) that is to be the gate insulating film 812 is deposited so as to cover the oxide semiconductor layer 811, and then the gate electrode 813 is formed. Then, the oxide insulating film is etched using the gate electrode 813 as a mask, so that the gate insulating layer 812 is formed. The etching results in exposing portions of the oxide semiconductor layer 811 that are not covered with the gate electrode 813. Next, the silicon nitride film 816 is formed. Therefore, the portions of the oxide semiconductor layer 811 that are in contact with the silicon nitride film 816 are supplied with nitrogen and thus are decreased in resistance, and as a result, become the low resistance regions 811b and 811c. The remaining portion becomes the channel region 811a. 
It is described regarding the semiconductor device 800 in Patent Document No. 1 that since the low resistance regions 811b and 811c are formed in this manner, the oxide semiconductor TFT 810 is obtained by a relatively simple process to have a high on-characteristic.